Video Mixer feature implementation on Zynq FPGA

This reference tutorial is on how to implement multiple feature of video mixer including alpha blending , logo layer and using multiple TPG layer over the main input stream. We have used Digilent Zybo Z7-10 FPGA board for implementing this features while we also have separate demo and implementation for ZedBoard and MPSoC FPGA’s.

The major feature of Video Mixer are:

• Supports alpha-blending of nine video/graphics and logo layers
• Optional logo (in block RAM (BRAM)) layer with color transparency
• Layers can either be memory mapped AXI4 interface or AXI4-Stream
• Provides programmable background color
• Provides scaling of layers by 1x, 2x, or 4x
• Optional built-in color space conversion
• Supports RGB, YUV 444, YUV 422, YUV 420
• Supports 8, 10, 12, and 16 bits per color component
• Supports spatial resolutions from 64 × 64 up to 4,096 × 2,160
• Supports 4K60 in all supported device families

The VIVADO Block Diagram of the Video Mixer implementation is:

VIVADO block diagram of video mixer design

Libraries and Main function of the SDK application are herewith:

#include 	<stdio.h>
#include 	"platform.h"
#include 	"xil_printf.h"
#include	"xparameters.h"
#include 	"xv_mix.h"
#include 	"xv_mix_l2.h"
#include 	"xgpio.h"
#include 	"sleep.h"
#include 	"xuartps.h"
#include 	"xil_cache.h"
#include 	"xv_tpg.h"
#include 	"xscugic.h"
#include 	"xvtc.h"
#define LED 0x01
int main() {

	init_platform();

	/* Setup Reset line */
	gpio_hlsIpReset = (u32*) XPAR_RESET_GPIO_BASEADDR;
	//Release reset line
	*gpio_hlsIpReset = 1;

	SetupInterrupts();
	driverInit();
	detectHdmi();
	Xil_ExceptionEnable();
	resetIp();
	configVtcDet();
	configVtcGen();
	ConfigMixer(&VidStream);
	ConfigTpg(&VidStream);
	RunMixer();
	cleanup_platform();
	return 0;
}

In the reference tutorial we have showed different 7 cases of output in different configuration or feature enabled on video mixer. One of example output of video mixer feature implementation is as follows:

Video Mixer feature implementation with 2 TPG layer and one input video stream

The detail reference tutorial is linked here in PDF format: Goto Tutorial, Xilinx_Zynq-Video-Mixer-Tutorial_LogicTronix_June_2020.pdf

Reference of this Tutorial are:

For any queries or complete VIVADO project of this implementation, you can write us at: info@logictronix.com

#video #mixer #feature #alpha #blending #FPGA #Zynq #logo #TPG #Zybo #ZedBoard #MPSoC