We worked on different implementation of “Machine Learning(ML) Acceleration on FPGA”. We accelerate ML applications on MPSoCs: ZCU102/104/106 & Ultra96 and Cloud Based FPGAs -Alveo/VCU1525.

We provide turnkey solution on ML Acceleration including dataset preparation, training network , optimizing network architecture, pruning, quantizing, designing FPGA IP system, embedded linux development , deploying boot system on FPGA and designing custom FPGA Board-PCB.

See our Machine Learning Portfolio: LogicTronix[dot]com_ML_Portfolio

Our Machine Learning Acceleration flow:

Some of our Machine Learning/DNNDK based FPGA Implementations are:

1. Vehicle Counting with Ultra96 FPGA

We have developed the “real time vehicle counting system” based on camera feed or video stream of real traffic video. Our system can be implemented with low cost MPSoC board [Ultra96 FPGA] or other custom board with MPSoC.

Watch the demo of “Vehicle Counting System”: YouTube Link

2. Machine Learning with Xilinx VCU1525 with Nimbix Cloud Accelerator Platform:

This implementation uses the YoloV2 algorithm for object recognition, it is implemented on VCU1525 FPGA device on the Nimbix Cloud Platform.

3.Machine Learning with Alveo U200/U250 FPGA

We also have developed different applications based on ML Suite for Alveo FPGA [U200] card. For exploring with ML Suite for Alveo, ML Suite, there is also an example of image classification using the Googlenet with kernel precision INT8, INT16 for test classify and batch classify. This acceleration run on Alveo U200 as well as U250 [with some revision].

Here is the Video Tutorial Link: Machine Learning Suite Acceleration on Alveo FPGA-Video Tutorial.  If you need any reference document or support on it then you may contact us!

4. DPU TRD for ZCU104 [DNNDK Implementation]:

This application is developed for implementing the DNNDK on the ZCU104 using the PG338 of Xilinx[Deephi].  This implementation is used for Image Classification and Face Detection application with some other application.

5. DPU TRD for Ultra96 [DPU Integration for the Ultra96 FPGA]:

It is DNNDK implementation on the Ultra96 FPGA for Image Classification and Face Detection.

6. YoloV3 tiny for Object Detection on Ultra96 FPGA with DNNDK

YOLO-V3 tiny [caffe] for Object Detection with DPU-DNNDK and Ultra96 FPGA. This implementation convert the YOLOv3 tiny into Caffe Model from Darknet and implemented on the DPU-DNNDK 3.0 version.
It is generating 30+ FPS on video and 20+FPS on direct Camera [Logitech C525] Stream. Goto tutorial: Yolov3-tiny-on-DNNDK-by-LogicTronix

7. Machine Learning with PYNQ FPGA:

We have used the BNN for digit recognition and vehicle number plate recognition, QNN/CNN for image classification and few other NN/ML algorithm are used for other applications as traffic sign detection, object recognition etc.

If you are interested on implementing Machine Learning algorithms or Neural Networks on you application or custom application then you can contact us at: info@logictronix.com or sales@logictronix.com.