For optimizing the High Frequency Trading (HFT) infrastructure, we implemented ouch decoder/encoder for building tick to trade system in FPGA. These implementations are optimized for low latency which is around 15 ns or less. All engines are implemented on VHDL using latest Xilinx VIVADO as a design tool and simulator.
Ouch Protocol
Ouch is the low level native protocol for connecting to NASDAQ. It allows NASDAQ participants to enter, replace & cancel orders and receive executions. The protocol is composed of logical messages passed between ouch host and client application.
Ouch Decoder:
Ouch decoder receives the outbound messages from NASDAQ through TCP and decodes it making it accessible for further processing with order book and custom trading algorithm. Here are some details on its implementation.
Specifications:
Decoded Message Types:
Design Structure:
The design is separated in three stages. In the first stage we identify all 15 message types. In the second stage we decode the information that is directly available for a given message type such as event codes, order tokens, share, stock price etc. In the third stage we decode what values from the second stage mean. for eg. start or end of day, display attributes, bbo weight indicator, liquidity flags etc.
The latency we get directly corresponds to stages of the design.
Testing Methodology:
For testing we provided encoded messages as stimulus to decoder. Stimulus data were manually designed such that every possible data output port (265 of them) were to be triggered. Upon close inspection of each port, we got all output as expected.
Ouch Encoder:
Ouch Encoder encodes the data to be sent as an inbound message from participant to ouch host. Here are some details of its implementation.
Specifications:
Encoded Message Types:
- Enter Order
- Replace Order
- Cancel Order
- Modify Order
- Trade Now
Design Structure:
Because of having fewer message types we implemented encoder as modular design. Encoding of each message type was implemented separately and then finally combined. Unlike ouch decoder, latency here is fixed regardless of any stages.
Testing Methodology:
For testing we stimulated each of 75 inputs one by one and looked at each output whether it fits ouch protocol specifications or not.
Note: If you like to know more on our “Low Latency Ouch Implementation”, then please write us at info@logictronix.com .